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Asic digital design engineer, principal

Porto
Synopsys Inc
Design
Anunciada dia 4 julho
Descrição

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

An experienced and visionary ASIC Design Engineer, Principal who is passionate about driving the future of semiconductor technology. You possess deep functional knowledge and expertise in design methodologies, and you thrive in an environment where you can influence and implement strategic goals. Your background includes a comprehensive understanding of serial protocols such as HBM, DDR, LPDDR etc. You can define and execute Functional specification or Design architecture for protocols such as HBM/DDR/LPDDR. You are a proactive problem solver, capable of working with minimal oversight, and you excel in communicating complex technical concepts to a diverse audience. Your leadership skills enable you to guide and mentor teams, fostering innovation and excellence in all your projects.

What You’ll Be Doing:

* Defining and developing ASIC RTL modules.
* Creating complex digital designs, particularly focusing on HBM/DDR/LPDDR protocols.
* Collaborating with cross-functional teams to ensure seamless integration and functionality of designs.
* Collaborating with cross-functional teams to ensure full closure of verification of the designs.
* Striving to achieve high-quality results.
* Mentoring and guiding junior engineers, promoting best practices, and fostering a culture of continuous improvement.
* Communicating with internal and external stakeholders to align on project goals and deliverables.

The Impact You Will Have:

* Enhancing the reliability and performance of Synopsys’ digital design processes.
* Improving time-to-market for robust Synopsys Interface IP controller through definition of valid design trade-offs.
* Mentoring and nurturing a highly skilled design team, elevating overall project quality.
* Influencing strategic decisions that shape the future of Synopsys’ capabilities.
* Ensuring that Synopsys remains a leader in the semiconductor industry through continuous technological advancements.

What You’ll Need:

* Extensive experience in ASIC RTL design.
* In-depth knowledge of HBM, DDR, LPDDR and similar IO protocols.
* Proficiency in advanced digital design tools and methodologies.
* Strong problem-solving skills and the ability to work independently.
* Excellent communication skills for effective collaboration with diverse teams.

Who You Are:

* A mentor who fosters talent and encourages innovation.
* A proactive problem solver who thrives in complex environments.
* An effective communicator with the ability to convey technical concepts to a broad audience.
* A team player who values collaboration and diversity.
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