We Are:At Synopsys, we drive the innovations that shape the way we live and connect.
Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines.
We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content.
Join us to transform the future through continuous technological innovation.
You Are:You are a highly motivated and innovative ASIC Digital Design engineer with a strong background in ASIC Digital development flow.
You possess a keen understanding of SerDes standards and architecture documents, and you are adept at developing analog sub-block specifications.
You have a proven track record of identifying and refining circuit implementations to achieve optimal power, area, and performance targets.
You excel in proposing design and verification strategies that efficiently use simulator features to ensure the highest quality design.
You thrive in complex block and/or chip planning and architecture studies, and you have hands-on experience in implementing mixed-signal blocks using Verilog.
Your expertise extends to behavioral modeling activities using Verilog/SystemVerilog language.
You are committed to continuous documentation and improvement of design and verification environments/plans and overall procedures.
With a degree in engineering or applied science, you have a minimum of 5 years of related experience or an advanced degree with a minimum of 3 years of related experience.
Knowledge of IC design flows and analog circuit design would be advantageous, as well as familiarity with the Custom Designer tool.
You possess excellent organizational skills and a willingness to learn new things.
What You'll Be Doing:Reviewing SerDes standards and architecture documents to develop analog sub-block specifications.Identifying and refining circuit implementations to achieve optimal power, area, and performance targets.Proposing design and verification strategies that efficiently use simulator features to ensure the highest quality design.Participating in complex block and/or chip planning and architecture studies.Implementing mixed-signal blocks using Verilog.Engaging in behavioral modeling activities using Verilog/SystemVerilog language.Continuously documenting and improving design and verification environments/plans and overall procedures.The Impact You Will Have:Contribute to the development of high-performance silicon chips that power the latest technological innovations.Play a key role in achieving optimal performance, power efficiency, and area targets for our products.Ensure the highest quality of design through effective verification strategies.Influence the planning and architecture of complex blocks and chips.Enhance the capabilities of our mixed-signal design and verification team.Drive continuous improvement in our design and verification processes.What You'll Need:A Bachelor's degree in engineering or applied science and a minimum of 5 years of related experience, or an advanced degree with a minimum of 3 years of related experience.Experience in producing high-quality technical documentation.Knowledge of IC design flows and analog circuit design.Familiarity with the Custom Designer tool.Strong organizational skills and a willingness to learn new things.Who You Are:Detail-oriented with excellent problem-solving skills.Effective communicator with the ability to work collaboratively within a team.Innovative thinker with a passion for continuous learning and improvement.Adaptable and able to thrive in a dynamic, fast-paced environment.Proactive and self-motivated with a strong sense of ownership.The Team You'll Be A Part Of:You will be part of a highly experienced mixed-signal design and verification team, targeting the current and next generation USB/PCIe/DPHY/CDPHY/MPHY/DP/HDMI products (up to 13.5Gbps).
The position offers an excellent opportunity to work with a skilled team of digital and mixed-signal engineers delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.
The PHY development is very dynamic and provides an endless list of challenges.
You will receive initial training from top experts in the field, as well as continuous on-the-job training.
The work is challenging, given the constant technological changes, the ownership, and the need to chart unknown waters.
Rewards and Benefits:We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
Our total rewards include both monetary and non-monetary offerings.
Your recruiter will provide more details about the salary range and benefits during the hiring process.
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