At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
We are seeking an experienced, highly motivated, and high-caliber individual to join our PVT sensor group as a Layout Design, Staff Engineer. You are someone who thrives in a collaborative environment and has a passion for creating cutting-edge technology. You have a strong technical background in custom Analog/AMS design layout methodologies and tools, and you are adept at working with advanced finfet process challenges. Your expertise in full custom layout flows, physical verification, and hi-speed layout design sets you apart. You are a proactive problem solver with a keen eye for detail and a dedication to delivering high-quality results. Your excellent communication and interpersonal skills enable you to work effectively with internal teams and external customers. Above all, you are driven by a desire to innovate and contribute to the success of our technology products.
What You’ll Be Doing:
* Developing Process, Voltage, Temperature (PVT) monitors as part of the PVTIP product portfolio.
* Creating new IPs and updating existing ones through collaboration with other layout and schematic engineers.
* Building and refining layout flows to enhance efficiency and effectiveness.
* Executing full custom layout techniques for analog blocks.
* Conducting post-layout extraction and utilizing the results in layout design.
* Ensuring layouts meet advanced finfet process requirements and conducting physical verification using tools like LVS and DRC.
The Impact You Will Have:
* Enhancing the performance, power, area, schedule, and yield of semiconductor products through innovative layout designs.
* Enabling faster integration of hardware IPs for customers, reducing time-to-market and associated risks.
* Improving the reliability and efficiency of technology products with advanced in-chip sensors and analytics.
* Contributing to the development of differentiated products that meet the unique challenges of various target applications.
* Supporting Synopsys’ leadership in chip design and verification by delivering high-quality layout solutions.
* Driving continuous technological innovation and shaping the future of intelligent in-chip sensors.
What You’ll Need:
* BS or MS degree in Electrical Engineering with 5+ years of relevant industry experience.
* Sound knowledge of custom Analog/AMS design layout methodologies, layout tools, and physical verification.
* Proficiency in layout of analog blocks using full custom layout techniques.
* Experience in hi-speed layout design and post-layout extraction.
* Familiarity with advanced finfet process challenges and tools like LVS, DRC.
Who You Are:
You possess excellent teamwork, communication, mentoring, and interpersonal skills. You are skilled in customer interactions and managing expectations, scope, and requests. Your experience with SPICE simulator concepts, post-layout tools like Custom StarRC, CalibrexRC, HSPICE, FineSim, and statistical design methodologies like Monte-Carlo analysis is a plus. Experience in PVT-sensors and/or DFT/DFx technologies is highly desirable.
The Team You’ll Be A Part Of:
Our PVT sensor group is dedicated to building next-generation intelligent in-chip sensors, hardware/software capabilities, and analytics. As part of the rapidly expanding IPG business unit, you will work closely with a team of talented engineers to develop innovative IPs that enhance the performance and reliability of semiconductor products.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
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